CATALOGO DEI PRODOTTI DELLA RICERCA

PRAVADELLI, Graziano
 Distribuzione geografica
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Continente #
NA - Nord America 11.342
EU - Europa 8.425
AS - Asia 6.144
SA - Sud America 731
Continente sconosciuto - Info sul continente non disponibili 297
AF - Africa 199
OC - Oceania 17
Totale 27.155
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Nazione #
US - Stati Uniti d'America 11.129
RU - Federazione Russa 3.252
SG - Singapore 2.492
CN - Cina 1.549
GB - Regno Unito 1.532
IT - Italia 1.058
HK - Hong Kong 603
VN - Vietnam 599
BR - Brasile 552
SE - Svezia 500
DE - Germania 424
FR - Francia 424
FI - Finlandia 411
IE - Irlanda 363
KR - Corea 219
BD - Bangladesh 199
CA - Canada 116
UA - Ucraina 100
IN - India 91
BE - Belgio 67
AR - Argentina 60
PL - Polonia 56
NL - Olanda 53
TR - Turchia 51
ES - Italia 50
NG - Nigeria 50
MX - Messico 49
JP - Giappone 48
ZA - Sudafrica 40
AT - Austria 39
ID - Indonesia 35
PH - Filippine 35
IQ - Iraq 31
VE - Venezuela 25
CO - Colombia 22
PE - Perù 22
SA - Arabia Saudita 21
TW - Taiwan 21
BJ - Benin 20
EC - Ecuador 20
TG - Togo 20
AE - Emirati Arabi Uniti 18
CL - Cile 18
PK - Pakistan 18
KE - Kenya 17
UZ - Uzbekistan 17
MY - Malesia 15
JO - Giordania 13
MA - Marocco 13
IL - Israele 12
AU - Australia 11
AZ - Azerbaigian 10
LT - Lituania 9
NO - Norvegia 9
AL - Albania 8
KZ - Kazakistan 8
NP - Nepal 8
PY - Paraguay 8
TN - Tunisia 8
DO - Repubblica Dominicana 7
EE - Estonia 7
OM - Oman 7
CH - Svizzera 6
CR - Costa Rica 6
CZ - Repubblica Ceca 6
DK - Danimarca 6
EG - Egitto 6
ET - Etiopia 6
JM - Giamaica 6
BG - Bulgaria 5
DZ - Algeria 5
EU - Europa 5
KG - Kirghizistan 5
MD - Moldavia 5
NZ - Nuova Zelanda 5
RO - Romania 5
SN - Senegal 5
GT - Guatemala 4
NI - Nicaragua 4
PT - Portogallo 4
UY - Uruguay 4
BY - Bielorussia 3
GR - Grecia 3
HN - Honduras 3
HU - Ungheria 3
IR - Iran 3
LU - Lussemburgo 3
LV - Lettonia 3
RS - Serbia 3
AM - Armenia 2
BB - Barbados 2
BH - Bahrain 2
BZ - Belize 2
GD - Grenada 2
LB - Libano 2
PA - Panama 2
PR - Porto Rico 2
PS - Palestinian Territory 2
RE - Reunion 2
SI - Slovenia 2
Totale 26.833
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Città #
Ashburn 1.442
Singapore 1.440
Southend 1.206
Moscow 1.072
San Jose 1.028
Chandler 1.009
Dallas 968
Jacksonville 905
Woodbridge 727
Hong Kong 588
Ann Arbor 530
Verona 441
Dublin 358
Council Bluffs 328
The Dalles 310
Houston 259
Beijing 248
New York 231
Ho Chi Minh City 191
Los Angeles 185
Princeton 146
Lawrence 143
Hanoi 140
Helsinki 137
Milan 131
Wilmington 120
Santa Clara 113
Buffalo 105
Nanjing 94
Jinan 83
São Paulo 78
Sindelfingen 77
Boardman 70
Brussels 65
Columbus 65
Shenyang 64
Hebei 56
Chicago 53
Tianjin 53
Seoul 51
Abuja 48
Denver 46
London 43
Redondo Beach 41
Tokyo 41
Warsaw 41
Toronto 39
Guangzhou 37
Munich 37
Brooklyn 36
Frankfurt am Main 36
Orem 36
Ningbo 33
Seattle 33
Washington 32
Atlanta 31
Changsha 31
Phoenix 31
San Francisco 31
Montreal 30
Rome 30
Jiaxing 29
Taizhou 28
Haikou 27
Nanchang 27
Shanghai 27
Stockholm 27
Zhengzhou 27
Hangzhou 26
Amsterdam 25
Da Nang 25
Chennai 24
Falkenstein 24
Madrid 24
Dong Ket 23
Johannesburg 23
Las Pinas 23
Nuremberg 23
Kent 22
Lappeenranta 22
Norwalk 22
Vienna 22
Des Moines 21
Cotonou 20
Haiphong 20
Lomé 20
Providence 20
Taiyuan 20
Ankara 16
Jakarta 16
Redwood City 16
Charlotte 15
Mexico City 15
Poplar 15
Rio de Janeiro 15
Tashkent 15
Fairfield 14
Manchester 14
Nairobi 14
Turin 14
Totale 16.893
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Nome #
A 1000X Speed Up for Properties Completeness Evaluation 285
A CLP-based Functional ATPG for Extended FSMs 259
A Formal Support for Homogeneous Simulation of Heterogeneous Embedded Systems 242
Automatic HDL Conversion and Abstraction Methodologies 239
Hardware Design and Simulation for Verification 222
A Co-Simulation Methodology for HW/SW Validation and Performance Estimation 219
EFSM Manipulation to Increase High-Level ATPG 218
HIFSuite: Tools for HDL Code Conversion and Manipulation 218
Enhancing Safety and Privacy in Industry 4.0: The ICE Laboratory Case Study 212
Enabling dynamic assertion-based verification of embedded software through model-driven design 204
Efficient Control-Flow Subgraph Matching for Detecting Hardware Trojans in RTL Models 203
Towards posture and gait evaluation through wearable-based biofeedback technologies 199
Real-Time Multi-Person Identification and Tracking via HPE and IMU Data Fusion 199
Redundant Functional Faults Reduction by Saboteur Synthesis 197
Improving High-Level and Gate-Level Testing with FATE: a Functional ATPG Traversing Unstabilized EFSMs 196
Functional Fault Coverage: the Chamber of Secrets or an Accurate Estimation of Gate-Level Coverage? 194
On the Reuse of RTL assertions in Systemc TLM Verification 193
A graph-based approach for mobile localization exploiting real and virtual landmarks 192
A SystemC-based Framework for Properties Incompleteness Evaluation 191
A-TEAM: Automatic template-based assertion miner 191
Towards a wearable system for predicting the freezing of gait in people affected by Parkinson's disease 191
HIFSuite: Tools for HDL Code Conversion and Manipulation 191
Test generation based on CLP 190
Logic-Level Mapping of High-Level Faults 188
Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions 188
Fault model qualification by assertion mining 187
FATE: a Functional ATPG to Traverse unstabilized EFSMs 185
Mangrove: an Inference-based Dynamic Invariant Mining for GPU Architectures 184
Functional Verification based on the EFSM Model 184
An EFSM-based Approach for Functional ATPG 183
Combining Dynamic Slicing and Mutation Operators for ESL Correction 181
A low-cost wireless body area network for human activity recognition in healthy life and medical applications 180
A containerized ROS-compliant verification environment for robotic systems 180
A Methodology for Abstracting RTL Designs into TL Descriptions 179
A virtual coaching platform to support therapy compliance in obesity 179
Mixing ATPG and Property Checking for Testing HW/SW Interfaces 178
A testbench specification language for SystemC Verification 178
Efficient Generation of Stimuli for Functional Verification by Backjumping Across Extended FSMs 176
UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration 176
Improving Gate-Level ATPG by Traversing Concurrent EFSMs 175
UNIVERCM: the UNIversal VERsatile Computational Model for heterogeneous embedded system design 174
An Optimized CLP-based Technique for Generating Propagation Sequences 173
Semiformal Assertion-Based Verification of Hardware/Software Systems in a Model-Driven Design Framework 173
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces 172
Automatic generation of self-adaptive transactors from PSL assertions 172
A Pseudo-Deterministic Functional ATPG based on EFSM Traversing 170
Effective EFSM generation for HW/SW-design verification 170
On the use of assertions for embedded-software dynamic verification 170
Practical identity recognition using WiFi's Channel State Information 168
Exploiting sub-graph isomorphism and probabilistic neural networks for the detection of hardware Trojans at RTL 166
A Verification Methodology for Reconfigurable Systems 166
Model-Driven Design and Validation of Embedded Software 165
Accurate Profiling of Oracles for Self-Checking Time-Constrained Embedded Software 165
A Smooth Refinement Flow for Co-designing HW and SW Threads 164
Automatic generation of EFSMs and HLDDs for functional ATPG 164
DDPSL: an Easy Way of Defining Properties 163
Dynamic property mining for embedded software 163
Estimating Indoor Occupancy Through Low-Cost BLE Devices 163
An Error Simulation Based Approach to Measure Error Coverage of Formal Properties 162
IPA: Reusing of Properties after Discretization of Hybrid Automata 162
On the Reuse of VHDL Modules into SystemC Design 161
Mutation Analysis for SystemC Designs at TLM 161
On the Reuse of TLM Mutation Analysis at RTL 161
Exploiting GPU Architectures for Dynamic Invariant Mining 161
MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution 159
Reusing RTL assertion checkers for verification of SystemC TLM models 159
A low-cost BLE-based distance estimation, occupancy detection and counting system 159
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey 158
A Systematic Literature Review on Mining LTL Specifications 157
A common architecture for co-simulation of SystemC models in QEMU and OVP virtual platforms 157
Automatic generation of power state machines through dynamic mining of temporal assertions 157
Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach 155
IPA: Assertion-based verification in embedded-software design 154
Work-in-Progress: DOVE: Pinpointing firmware security vulnerabilities via symbolic control flow assertion mining 154
AMLETO: A Multi-language Environment for Functional Test Generation 154
Integrating Wearable and Camera Based Monitoring in the Digital Twin for Safety Assessment in the Industry 4.0 Era 153
Symbad: Formal Verification in System Level-based Design (Extended Version) 153
The Strange Pair: IP-XACT and UNIVERCM to Integrate Heterogeneous Embedded Systems 153
Vacuity Analysis by Fault Simulation 152
An indoor localization system to detect areas causing the freezing of gait in Parkinsonians 152
Correct-by-construction generation of device drivers based on RTL testbenches 151
On the Use of a High-Level Fault Model to Analyze Logical Consequence of Properties 149
On the Functional Qualification of a Platform Model 149
Simplified stimuli generation for scenario and assertion based verification 149
Automatic extraction of assertions from execution traces of behavioural models 148
A parallelizable approach for mining likely invariants 148
Symbad: Formal Verification in System Level-based Design 147
Test Generation: A Symbolic Approach 145
Testbench qualification of SystemC TLM protocols through Mutation Analysis 145
A time-window based approach for dynamic assertions mining on control signals 145
SystemC as a Complete Design and Validation Environment 144
Redesign and Verification of RTL IPs through RTL-to-TLM Abstraction and TLM Synthesis 144
Edge-Cloud Orchestration of Assertion-Based Monitors for Robotic Applications 143
Hybrid Incremental Assertion-Based Verification for Functional Validation in TLM Design Flows 143
Combining 3D Human Pose Estimation and IMU Sensors for Human Identification and Tracking in Multi-Person Environments 142
A Timing-Accurate HW/SW Co-Simulation of an ISS with SystemC 142
RTL assertion mining with automated RTLto-TLM abstraction 142
MIST: monitor generation from informal specifications for firmware verification 142
Incremental ABV for TL-to-RTL Design Refinement 141
Stimuli Generation through Invariant Mining for Black-Box Verification 141
Totale 17.301
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Categoria #
all - tutte 94.840
article - articoli 19.895
book - libri 426
conference - conferenze 69.332
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 5.187
Totale 189.680
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022750 0 0 0 112 77 22 19 53 48 35 98 286
2022/20232.790 197 275 269 465 286 568 52 191 337 54 66 30
2023/20241.470 75 118 123 151 110 281 105 95 27 117 196 72
2024/20253.506 173 341 113 592 129 176 64 253 429 220 362 654
2025/202611.398 762 649 874 1.782 2.838 770 1.099 638 741 651 228 366
2026/20271.611 127 292 534 658 0 0 0 0 0 0 0 0
Totale 27.155