CATALOGO DEI PRODOTTI DELLA RICERCA

PRAVADELLI, Graziano
 Distribuzione geografica
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Continente #
NA - Nord America 10.063
EU - Europa 8.351
AS - Asia 6.106
SA - Sud America 692
Continente sconosciuto - Info sul continente non disponibili 297
AF - Africa 198
OC - Oceania 17
Totale 25.724
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Nazione #
US - Stati Uniti d'America 9.883
RU - Federazione Russa 3.250
SG - Singapore 2.485
CN - Cina 1.544
GB - Regno Unito 1.523
IT - Italia 1.018
HK - Hong Kong 603
VN - Vietnam 598
BR - Brasile 530
SE - Svezia 500
FR - Francia 421
DE - Germania 415
FI - Finlandia 411
IE - Irlanda 362
KR - Corea 219
BD - Bangladesh 198
UA - Ucraina 100
CA - Canada 96
IN - India 88
BE - Belgio 67
AR - Argentina 60
PL - Polonia 56
NL - Olanda 51
NG - Nigeria 50
TR - Turchia 49
ES - Italia 48
MX - Messico 48
JP - Giappone 42
ZA - Sudafrica 40
AT - Austria 39
PH - Filippine 32
ID - Indonesia 31
IQ - Iraq 31
TW - Taiwan 21
BJ - Benin 20
PE - Perù 20
TG - Togo 20
EC - Ecuador 19
VE - Venezuela 19
SA - Arabia Saudita 18
AE - Emirati Arabi Uniti 17
PK - Pakistan 17
UZ - Uzbekistan 17
CL - Cile 16
CO - Colombia 16
KE - Kenya 16
MY - Malesia 14
JO - Giordania 13
MA - Marocco 13
IL - Israele 12
AU - Australia 11
AZ - Azerbaigian 10
LT - Lituania 9
NO - Norvegia 9
KZ - Kazakistan 8
NP - Nepal 8
PY - Paraguay 8
TN - Tunisia 8
AL - Albania 7
DO - Repubblica Dominicana 7
OM - Oman 7
CH - Svizzera 6
CZ - Repubblica Ceca 6
EE - Estonia 6
EG - Egitto 6
ET - Etiopia 6
CR - Costa Rica 5
DZ - Algeria 5
EU - Europa 5
KG - Kirghizistan 5
NZ - Nuova Zelanda 5
RO - Romania 5
SN - Senegal 5
BG - Bulgaria 4
DK - Danimarca 4
JM - Giamaica 4
MD - Moldavia 4
PT - Portogallo 4
UY - Uruguay 4
BY - Bielorussia 3
GR - Grecia 3
GT - Guatemala 3
HU - Ungheria 3
IR - Iran 3
LU - Lussemburgo 3
LV - Lettonia 3
NI - Nicaragua 3
RS - Serbia 3
AM - Armenia 2
BB - Barbados 2
BH - Bahrain 2
GD - Grenada 2
HN - Honduras 2
LB - Libano 2
PA - Panama 2
PS - Palestinian Territory 2
RE - Reunion 2
SI - Slovenia 2
SK - Slovacchia (Repubblica Slovacca) 2
TH - Thailandia 2
Totale 25.408
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Città #
Singapore 1.437
Southend 1.206
Ashburn 1.143
Moscow 1.072
Chandler 1.009
Jacksonville 903
San Jose 880
Dallas 879
Woodbridge 727
Hong Kong 588
Ann Arbor 530
Verona 441
Dublin 358
The Dalles 310
Houston 253
Beijing 245
New York 226
Ho Chi Minh City 190
Los Angeles 171
Council Bluffs 158
Princeton 144
Lawrence 143
Hanoi 140
Helsinki 137
Milan 125
Wilmington 119
Buffalo 105
Nanjing 94
Santa Clara 90
Jinan 83
Sindelfingen 77
Boardman 70
São Paulo 70
Brussels 65
Shenyang 64
Columbus 63
Hebei 56
Tianjin 53
Seoul 51
Abuja 48
Chicago 43
London 43
Redondo Beach 41
Warsaw 41
Guangzhou 37
Tokyo 37
Orem 36
Denver 34
Frankfurt am Main 34
Munich 34
Ningbo 33
Seattle 32
Toronto 32
Changsha 31
San Francisco 31
Brooklyn 29
Jiaxing 29
Montreal 29
Taizhou 28
Haikou 27
Nanchang 27
Rome 27
Stockholm 27
Zhengzhou 27
Hangzhou 26
Shanghai 26
Da Nang 25
Amsterdam 24
Chennai 24
Falkenstein 24
Phoenix 24
Atlanta 23
Dong Ket 23
Johannesburg 23
Las Pinas 23
Madrid 23
Nuremberg 23
Kent 22
Lappeenranta 22
Norwalk 22
Vienna 22
Des Moines 21
Cotonou 20
Haiphong 20
Lomé 20
Taiyuan 20
Ankara 16
Jakarta 16
Redwood City 16
Mexico City 15
Poplar 15
Rio de Janeiro 15
Tashkent 15
Fairfield 14
Manchester 14
Nairobi 14
Amman 13
Chions 13
Istanbul 13
Turin 13
Totale 16.014
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Nome #
A 1000X Speed Up for Properties Completeness Evaluation 272
A CLP-based Functional ATPG for Extended FSMs 250
A Formal Support for Homogeneous Simulation of Heterogeneous Embedded Systems 235
Automatic HDL Conversion and Abstraction Methodologies 219
Hardware Design and Simulation for Verification 216
A Co-Simulation Methodology for HW/SW Validation and Performance Estimation 213
HIFSuite: Tools for HDL Code Conversion and Manipulation 212
EFSM Manipulation to Increase High-Level ATPG 204
Enhancing Safety and Privacy in Industry 4.0: The ICE Laboratory Case Study 202
Efficient Control-Flow Subgraph Matching for Detecting Hardware Trojans in RTL Models 198
Enabling dynamic assertion-based verification of embedded software through model-driven design 196
Real-Time Multi-Person Identification and Tracking via HPE and IMU Data Fusion 193
Towards posture and gait evaluation through wearable-based biofeedback technologies 191
On the Reuse of RTL assertions in Systemc TLM Verification 188
Towards a wearable system for predicting the freezing of gait in people affected by Parkinson's disease 187
Functional Fault Coverage: the Chamber of Secrets or an Accurate Estimation of Gate-Level Coverage? 186
A graph-based approach for mobile localization exploiting real and virtual landmarks 186
A-TEAM: Automatic template-based assertion miner 185
Test generation based on CLP 184
Fault model qualification by assertion mining 183
A SystemC-based Framework for Properties Incompleteness Evaluation 182
HIFSuite: Tools for HDL Code Conversion and Manipulation 182
Improving High-Level and Gate-Level Testing with FATE: a Functional ATPG Traversing Unstabilized EFSMs 181
Logic-Level Mapping of High-Level Faults 181
Mangrove: an Inference-based Dynamic Invariant Mining for GPU Architectures 179
Functional Verification based on the EFSM Model 179
FATE: a Functional ATPG to Traverse unstabilized EFSMs 178
An EFSM-based Approach for Functional ATPG 175
Mixing ATPG and Property Checking for Testing HW/SW Interfaces 172
A virtual coaching platform to support therapy compliance in obesity 172
A low-cost wireless body area network for human activity recognition in healthy life and medical applications 171
Combining Dynamic Slicing and Mutation Operators for ESL Correction 171
A containerized ROS-compliant verification environment for robotic systems 171
A Methodology for Abstracting RTL Designs into TL Descriptions 170
UNIVERCM: the UNIversal VERsatile Computational Model for heterogeneous embedded system design 170
Improving Gate-Level ATPG by Traversing Concurrent EFSMs 169
An Optimized CLP-based Technique for Generating Propagation Sequences 169
Efficient Generation of Stimuli for Functional Verification by Backjumping Across Extended FSMs 169
A testbench specification language for SystemC Verification 169
Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions 167
UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration 167
Automatic generation of self-adaptive transactors from PSL assertions 166
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces 164
Redundant Functional Faults Reduction by Saboteur Synthesis 163
A Pseudo-Deterministic Functional ATPG based on EFSM Traversing 163
Effective EFSM generation for HW/SW-design verification 163
On the use of assertions for embedded-software dynamic verification 163
Semiformal Assertion-Based Verification of Hardware/Software Systems in a Model-Driven Design Framework 163
Exploiting sub-graph isomorphism and probabilistic neural networks for the detection of hardware Trojans at RTL 161
A Verification Methodology for Reconfigurable Systems 161
Practical identity recognition using WiFi's Channel State Information 161
Dynamic property mining for embedded software 158
Exploiting GPU Architectures for Dynamic Invariant Mining 158
A Smooth Refinement Flow for Co-designing HW and SW Threads 157
Automatic generation of EFSMs and HLDDs for functional ATPG 157
DDPSL: an Easy Way of Defining Properties 157
Model-Driven Design and Validation of Embedded Software 157
On the Reuse of TLM Mutation Analysis at RTL 156
Reusing RTL assertion checkers for verification of SystemC TLM models 156
Estimating Indoor Occupancy Through Low-Cost BLE Devices 156
On the Reuse of VHDL Modules into SystemC Design 155
Accurate Profiling of Oracles for Self-Checking Time-Constrained Embedded Software 155
A low-cost BLE-based distance estimation, occupancy detection and counting system 153
An Error Simulation Based Approach to Measure Error Coverage of Formal Properties 152
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey 152
Mutation Analysis for SystemC Designs at TLM 152
Automatic generation of power state machines through dynamic mining of temporal assertions 151
A Systematic Literature Review on Mining LTL Specifications 149
MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution 149
The Strange Pair: IP-XACT and UNIVERCM to Integrate Heterogeneous Embedded Systems 149
A common architecture for co-simulation of SystemC models in QEMU and OVP virtual platforms 148
Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach 148
An indoor localization system to detect areas causing the freezing of gait in Parkinsonians 147
Vacuity Analysis by Fault Simulation 146
IPA: Assertion-based verification in embedded-software design 146
AMLETO: A Multi-language Environment for Functional Test Generation 146
Integrating Wearable and Camera Based Monitoring in the Digital Twin for Safety Assessment in the Industry 4.0 Era 145
Symbad: Formal Verification in System Level-based Design (Extended Version) 145
Work-in-Progress: DOVE: Pinpointing firmware security vulnerabilities via symbolic control flow assertion mining 145
Correct-by-construction generation of device drivers based on RTL testbenches 144
On the Functional Qualification of a Platform Model 144
Automatic extraction of assertions from execution traces of behavioural models 144
Simplified stimuli generation for scenario and assertion based verification 142
IPA: Reusing of Properties after Discretization of Hybrid Automata 141
A time-window based approach for dynamic assertions mining on control signals 141
A parallelizable approach for mining likely invariants 141
On the Use of a High-Level Fault Model to Analyze Logical Consequence of Properties 140
Test Generation: A Symbolic Approach 138
SystemC as a Complete Design and Validation Environment 138
A Timing-Accurate HW/SW Co-Simulation of an ISS with SystemC 137
Hybrid Incremental Assertion-Based Verification for Functional Validation in TLM Design Flows 136
Redesign and Verification of RTL IPs through RTL-to-TLM Abstraction and TLM Synthesis 136
RTOS-aware refinement for TLM2.0-based HW/SW designs 135
EFSM-based model-driven approach to concolic testing of system-level design 135
Testbench qualification of SystemC TLM protocols through Mutation Analysis 135
Stimuli Generation through Invariant Mining for Black-Box Verification 135
Automatic generation of assertions for detection of firmware vulnerabilities through alignment of symbolic sequences 135
Laboratorio di Linux 134
Semi-Formal Functional Verification by EFSM traversing via NuSMV 134
Reusing of Properties after Discretization of Hybrid Automata 134
Totale 16.516
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Categoria #
all - tutte 89.496
article - articoli 18.655
book - libri 402
conference - conferenze 65.517
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 4.922
Totale 178.992
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/20221.088 0 326 12 112 77 22 19 53 48 35 98 286
2022/20232.790 197 275 269 465 286 568 52 191 337 54 66 30
2023/20241.470 75 118 123 151 110 281 105 95 27 117 196 72
2024/20253.506 173 341 113 592 129 176 64 253 429 220 362 654
2025/202611.398 762 649 874 1.782 2.838 770 1.099 638 741 651 228 366
2026/2027180 127 53 0 0 0 0 0 0 0 0 0 0
Totale 25.724