CATALOGO DEI PRODOTTI DELLA RICERCA

PRAVADELLI, Graziano
 Distribuzione geografica
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Continente #
NA - Nord America 7.676
EU - Europa 7.528
AS - Asia 4.527
SA - Sud America 578
AF - Africa 105
OC - Oceania 17
Continente sconosciuto - Info sul continente non disponibili 6
Totale 20.437
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Nazione #
US - Stati Uniti d'America 7.558
RU - Federazione Russa 2.951
SG - Singapore 1.788
GB - Regno Unito 1.492
CN - Cina 1.407
IT - Italia 646
HK - Hong Kong 559
SE - Svezia 498
BR - Brasile 459
FI - Finlandia 404
FR - Francia 401
DE - Germania 392
IE - Irlanda 357
VN - Vietnam 277
KR - Corea 172
UA - Ucraina 96
CA - Canada 66
BE - Belgio 64
IN - India 55
PL - Polonia 50
AR - Argentina 47
NL - Olanda 42
ES - Italia 38
TR - Turchia 38
MX - Messico 33
JP - Giappone 32
AT - Austria 30
BD - Bangladesh 30
ZA - Sudafrica 28
ID - Indonesia 26
PH - Filippine 25
BJ - Benin 20
TG - Togo 20
TW - Taiwan 20
EC - Ecuador 15
IQ - Iraq 15
PE - Perù 15
AU - Australia 11
CO - Colombia 11
CL - Cile 10
IL - Israele 10
MA - Marocco 10
VE - Venezuela 10
AE - Emirati Arabi Uniti 9
NO - Norvegia 9
UZ - Uzbekistan 9
JO - Giordania 7
KE - Kenya 7
LT - Lituania 7
PK - Pakistan 7
PY - Paraguay 7
SA - Arabia Saudita 7
AZ - Azerbaigian 6
DO - Repubblica Dominicana 6
EE - Estonia 6
EG - Egitto 6
AL - Albania 5
EU - Europa 5
NZ - Nuova Zelanda 5
BG - Bulgaria 4
CH - Svizzera 4
CZ - Repubblica Ceca 4
KG - Kirghizistan 4
KZ - Kazakistan 4
NP - Nepal 4
UY - Uruguay 4
DK - Danimarca 3
DZ - Algeria 3
IR - Iran 3
LU - Lussemburgo 3
LV - Lettonia 3
MD - Moldavia 3
MY - Malesia 3
PT - Portogallo 3
TN - Tunisia 3
AM - Armenia 2
BY - Bielorussia 2
ET - Etiopia 2
GD - Grenada 2
GR - Grecia 2
GT - Guatemala 2
HU - Ungheria 2
JM - Giamaica 2
RE - Reunion 2
RO - Romania 2
TJ - Tagikistan 2
A2 - ???statistics.table.value.countryCode.A2??? 1
BA - Bosnia-Erzegovina 1
BB - Barbados 1
BF - Burkina Faso 1
BH - Bahrain 1
BN - Brunei Darussalam 1
DM - Dominica 1
GI - Gibilterra 1
GM - Gambi 1
GP - Guadalupe 1
HN - Honduras 1
LK - Sri Lanka 1
ML - Mali 1
NI - Nicaragua 1
Totale 20.427
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Città #
Southend 1.206
Chandler 1.009
Moscow 993
Jacksonville 901
Dallas 874
Singapore 812
Woodbridge 727
Hong Kong 548
Ashburn 536
Ann Arbor 530
Dublin 353
Houston 247
Beijing 236
Verona 192
New York 187
Los Angeles 145
Lawrence 143
Princeton 143
Helsinki 133
Wilmington 119
The Dalles 109
Milan 107
Nanjing 92
Buffalo 91
Ho Chi Minh City 91
Jinan 83
Sindelfingen 77
Boardman 70
Santa Clara 69
Brussels 64
Shenyang 64
Columbus 63
São Paulo 57
Hebei 56
Hanoi 55
Seoul 51
Tianjin 49
Redondo Beach 41
London 39
Warsaw 38
Chicago 35
Munich 34
Ningbo 33
Changsha 31
Guangzhou 31
Jiaxing 29
Seattle 28
Taizhou 28
Denver 27
Haikou 27
Nanchang 27
San Francisco 27
Stockholm 27
Tokyo 27
Zhengzhou 27
Hangzhou 25
Falkenstein 24
Dong Ket 23
Las Pinas 23
Brooklyn 22
Kent 22
Norwalk 22
Nuremberg 22
Toronto 22
Cotonou 20
Johannesburg 20
Lomé 20
Madrid 20
Taiyuan 20
Des Moines 19
Lappeenranta 19
Montreal 19
Phoenix 19
Amsterdam 18
Frankfurt am Main 18
Vienna 17
Ankara 16
Redwood City 16
Atlanta 15
Fairfield 14
Jakarta 14
Mexico City 14
Shanghai 14
Chions 13
Da Nang 12
Lancaster 12
Rio de Janeiro 12
Rome 12
Turku 12
Brasília 11
Chennai 11
Council Bluffs 11
Haiphong 11
Orem 11
Poplar 11
Washington 11
Belo Horizonte 10
Fuzhou 10
Manchester 10
New Taipei 10
Totale 12.565
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Nome #
A 1000X Speed Up for Properties Completeness Evaluation 235
A CLP-based Functional ATPG for Extended FSMs 219
A Formal Support for Homogeneous Simulation of Heterogeneous Embedded Systems 211
Hardware Design and Simulation for Verification 191
A Co-Simulation Methodology for HW/SW Validation and Performance Estimation 187
Automatic HDL Conversion and Abstraction Methodologies 175
Enabling dynamic assertion-based verification of embedded software through model-driven design 172
Efficient Control-Flow Subgraph Matching for Detecting Hardware Trojans in RTL Models 171
HIFSuite: Tools for HDL Code Conversion and Manipulation 166
Functional Fault Coverage: the Chamber of Secrets or an Accurate Estimation of Gate-Level Coverage? 160
FATE: a Functional ATPG to Traverse unstabilized EFSMs 159
Logic-Level Mapping of High-Level Faults 158
EFSM Manipulation to Increase High-Level ATPG 157
A-TEAM: Automatic template-based assertion miner 157
Real-Time Multi-Person Identification and Tracking via HPE and IMU Data Fusion 156
Functional Verification based on the EFSM Model 156
Improving High-Level and Gate-Level Testing with FATE: a Functional ATPG Traversing Unstabilized EFSMs 154
Towards a wearable system for predicting the freezing of gait in people affected by Parkinson's disease 152
On the Reuse of RTL assertions in Systemc TLM Verification 152
A SystemC-based Framework for Properties Incompleteness Evaluation 151
Combining Dynamic Slicing and Mutation Operators for ESL Correction 150
A graph-based approach for mobile localization exploiting real and virtual landmarks 150
Test generation based on CLP 148
HIFSuite: Tools for HDL Code Conversion and Manipulation 148
An EFSM-based Approach for Functional ATPG 147
Improving Gate-Level ATPG by Traversing Concurrent EFSMs 147
UNIVERCM: the UNIversal VERsatile Computational Model for heterogeneous embedded system design 147
UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration 147
Practical identity recognition using WiFi's Channel State Information 147
An Optimized CLP-based Technique for Generating Propagation Sequences 146
Redundant Functional Faults Reduction by Saboteur Synthesis 145
Fault model qualification by assertion mining 145
A Methodology for Abstracting RTL Designs into TL Descriptions 144
Mangrove: an Inference-based Dynamic Invariant Mining for GPU Architectures 144
A testbench specification language for SystemC Verification 142
Mixing ATPG and Property Checking for Testing HW/SW Interfaces 141
A Pseudo-Deterministic Functional ATPG based on EFSM Traversing 141
Automatic generation of self-adaptive transactors from PSL assertions 141
On the Reuse of VHDL Modules into SystemC Design 140
Exploiting sub-graph isomorphism and probabilistic neural networks for the detection of hardware Trojans at RTL 140
A Verification Methodology for Reconfigurable Systems 140
A Smooth Refinement Flow for Co-designing HW and SW Threads 139
Effective EFSM generation for HW/SW-design verification 139
Enhancing Safety and Privacy in Industry 4.0: The ICE Laboratory Case Study 138
Automatic generation of EFSMs and HLDDs for functional ATPG 138
A containerized ROS-compliant verification environment for robotic systems 138
A virtual coaching platform to support therapy compliance in obesity 138
Semiformal Assertion-Based Verification of Hardware/Software Systems in a Model-Driven Design Framework 137
Exploiting GPU Architectures for Dynamic Invariant Mining 136
Dynamic and Formal Verification of Embedded Systems: A Comparative Survey 134
A low-cost wireless body area network for human activity recognition in healthy life and medical applications 132
Mutation Analysis for SystemC Designs at TLM 132
Dynamic property mining for embedded software 132
On the use of assertions for embedded-software dynamic verification 131
Model-Driven Design and Validation of Embedded Software 129
On the Reuse of TLM Mutation Analysis at RTL 129
Symbad: Formal Verification in System Level-based Design (Extended Version) 128
An Error Simulation Based Approach to Measure Error Coverage of Formal Properties 128
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces 128
MOUSSE: scaling MOdelling and verification to complex heterogeneoUS embedded Systems Evolution 127
Automatic extraction of assertions from execution traces of behavioural models 125
Reusing RTL assertion checkers for verification of SystemC TLM models 125
Automatic Generation and Qualification of Assertions on Control Signals: A Time Window-Based Approach 125
Automatic generation of power state machines through dynamic mining of temporal assertions 125
A low-cost BLE-based distance estimation, occupancy detection and counting system 125
Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions 124
IPA: Assertion-based verification in embedded-software design 124
On the Use of a High-Level Fault Model to Analyze Logical Consequence of Properties 123
Efficient Generation of Stimuli for Functional Verification by Backjumping Across Extended FSMs 123
Accurate Profiling of Oracles for Self-Checking Time-Constrained Embedded Software 123
A common architecture for co-simulation of SystemC models in QEMU and OVP virtual platforms 123
DDPSL: an Easy Way of Defining Properties 122
Laboratorio di Linux 121
A time-window based approach for dynamic assertions mining on control signals 121
A parallelizable approach for mining likely invariants 121
Estimating Indoor Occupancy Through Low-Cost BLE Devices 121
A Systematic Literature Review on Mining LTL Specifications 120
Vacuity Analysis by Fault Simulation 119
On the Functional Qualification of a Platform Model 119
AMLETO: A Multi-language Environment for Functional Test Generation 119
Correct-by-construction generation of device drivers based on RTL testbenches 118
Redesign and Verification of RTL IPs through RTL-to-TLM Abstraction and TLM Synthesis 118
IPA: Reusing of Properties after Discretization of Hybrid Automata 118
An indoor localization system to detect areas causing the freezing of gait in Parkinsonians 117
A Timing-Accurate HW/SW Co-Simulation of an ISS with SystemC 116
Symbad: Formal Verification in System Level-based Design 116
Simplified stimuli generation for scenario and assertion based verification 116
Work-in-Progress: DOVE: Pinpointing firmware security vulnerabilities via symbolic control flow assertion mining 115
Test Generation: A Symbolic Approach 114
SystemC as a Complete Design and Validation Environment 114
Hybrid Incremental Assertion-Based Verification for Functional Validation in TLM Design Flows 113
Stimuli Generation through Invariant Mining for Black-Box Verification 113
Integrating Wearable and Camera Based Monitoring in the Digital Twin for Safety Assessment in the Industry 4.0 Era 110
Testbench qualification of SystemC TLM protocols through Mutation Analysis 110
Towards posture and gait evaluation through wearable-based biofeedback technologies 109
Optimization of assertion placement in time-constrained embedded systems 109
Human Activity Recognition using Inertial, Physiological and Environmental Sensors: A Comprehensive Survey 109
Towards the automatic data annotation for human activity recognition based on wearables and BLE beacons 109
Logic-Level Analysis of High-Level Faults 108
At-Speed Functional Verification of Programmable Devices 108
Totale 13.720
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Categoria #
all - tutte 72.732
article - articoli 14.757
book - libri 346
conference - conferenze 53.577
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 4.052
Totale 145.464
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/2021741 0 0 0 0 145 156 34 99 115 20 109 63
2021/20221.156 68 326 12 112 77 22 19 53 48 35 98 286
2022/20232.790 197 275 269 465 286 568 52 191 337 54 66 30
2023/20241.470 75 118 123 151 110 281 105 95 27 117 196 72
2024/20253.506 173 341 113 592 129 176 64 253 429 220 362 654
2025/20266.573 762 649 874 1.782 2.506 0 0 0 0 0 0 0
Totale 20.719