The paper describes, first, a technique to automatically generate extended finite state machines (EFSMs) and high-level decision diagrams (HLDDs) from HDL descriptions. Then, these two paradigms are exploited inside a functional test pattern generator. The goal is to combine the beneficial properties of the above paradigms using EFSMs for targeting control FSM transitions and variable-oriented HLDDs for targeting bit-coverage faults in the data variables, respectively. Experimental results show that combining the two computational models in a functional ATPG yields indeed in higher fault coverage.
File in questo prodotto:
Non ci sono file associati a questo prodotto.