The paper presents a methodology for addressing hard-to-detect faults when a high-level ATPG is applied to verify functional descriptions of sequential circuits. A particular kind of extended finite state machines is adopted to improve detectability of such faults.
Functional Verification based on the EFSM Model
FUMMI, Franco;MARCONCINI, Cristina;PRAVADELLI, Graziano
2004-01-01
Abstract
The paper presents a methodology for addressing hard-to-detect faults when a high-level ATPG is applied to verify functional descriptions of sequential circuits. A particular kind of extended finite state machines is adopted to improve detectability of such faults.File in questo prodotto:
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