Automatic generation of power state machines through dynamic mining of temporal assertions

Several papers propose approaches based on power state machines (PSMs) for modelling and simulating the power consumption of system-on-chips (SoCs). However, while they focus on the use of PSMs as the underlying formalism for imple- menting dynamic power management techniques, they generally do not deal with the basic problem of generating PSMs. In most of these papers, PSMs just exist, in some cases they are manually defined, and only a few approaches give a hint of semi- automatic generation, but no fully-automatic approach exists in the literature. Indeed, without an automatic procedure, an accurate power characterization of complex SoCs by using PSMs is almost impossible. Thus, in this paper, first a methodology for the automatic generation of PSMs is proposed, and then, a statistical approach based on a Hidden Markov Model is presented for their simulation. The core of the approach is based on a mining procedure whose role consists of extracting temporal assertions describing the functional behaviours of the IP, which are then automatically mapped on states of the PSMs and characterized from the energy consumption point of view.