FUMMI, Franco
 Distribuzione geografica
Continente #
NA - Nord America 8823
EU - Europa 7278
AS - Asia 1733
OC - Oceania 16
SA - Sud America 13
Continente sconosciuto - Info sul continente non disponibili 7
AF - Africa 4
Totale 17874
Nazione #
US - Stati Uniti d'America 8789
GB - Regno Unito 3124
CN - Cina 1593
SE - Svezia 849
FR - Francia 740
IT - Italia 664
IE - Irlanda 587
FI - Finlandia 508
DE - Germania 338
UA - Ucraina 215
BE - Belgio 120
VN - Vietnam 68
RU - Federazione Russa 40
CA - Canada 27
NL - Olanda 22
TR - Turchia 15
AU - Australia 13
IN - India 11
JP - Giappone 10
GR - Grecia 9
ES - Italia 8
IL - Israele 8
PL - Polonia 8
LV - Lettonia 7
MX - Messico 7
CZ - Repubblica Ceca 6
AL - Albania 5
BG - Bulgaria 5
CL - Cile 5
DK - Danimarca 5
HK - Hong Kong 5
KR - Corea 5
SG - Singapore 5
EU - Europa 4
RO - Romania 4
SA - Arabia Saudita 4
A2 - ???statistics.table.value.countryCode.A2??? 3
BR - Brasile 3
HU - Ungheria 3
NZ - Nuova Zelanda 3
AR - Argentina 2
AT - Austria 2
BO - Bolivia 2
EE - Estonia 2
ID - Indonesia 2
KZ - Kazakistan 2
TH - Thailandia 2
BY - Bielorussia 1
CH - Svizzera 1
EG - Egitto 1
IM - Isola di Man 1
IS - Islanda 1
KW - Kuwait 1
LK - Sri Lanka 1
LU - Lussemburgo 1
MA - Marocco 1
NG - Nigeria 1
NO - Norvegia 1
PE - Perù 1
SC - Seychelles 1
SI - Slovenia 1
TW - Taiwan 1
Totale 17874
Città #
Southend 2804
Chandler 2045
Jacksonville 1949
Woodbridge 1317
Ann Arbor 1097
Houston 701
Dublin 578
Verona 303
Lawrence 292
Princeton 292
Wilmington 257
Nanjing 219
Ashburn 202
Jinan 192
Beijing 165
Shenyang 135
Brussels 120
Hebei 112
Boardman 100
Tianjin 81
Nanchang 75
Jiaxing 72
Changsha 71
Ningbo 59
Zhengzhou 59
Milan 58
Taizhou 58
Haikou 55
Norwalk 51
Lancaster 49
Guangzhou 43
Taiyuan 42
Hangzhou 41
Dong Ket 40
Fuzhou 29
San Francisco 24
Fairfield 22
Redwood City 21
Lanzhou 20
Auburn Hills 15
Chicago 13
Falls Church 13
Toronto 13
Clearwater 12
Helsinki 11
Rome 11
Dallas 9
San Diego 9
Shanghai 9
Naples 8
Riva 8
Cassano 7
Los Angeles 7
Padova 7
Torino 7
Groningen 6
Ottawa 6
Athens 5
Kemerovo 5
Melbourne 5
New York 5
Seattle 5
Singapore 5
Altavilla Silentina 4
Barletta 4
Canberra 4
Columbus 4
Duncan 4
Frankfurt am Main 4
Mezzolombardo 4
Pignone 4
Redmond 4
Roubaix 4
Sydney 4
Amsterdam 3
Chions 3
Delhi 3
Düsseldorf 3
Fremont 3
Mexico City 3
Montréal 3
Ogliastro Cilento 3
Philadelphia 3
Riyadh 3
Saint-martin-d'heres 3
Swindon 3
Tremezzo 3
Valbonne 3
Warsaw 3
Almere Stad 2
Aosta 2
Bangkok 2
Belvedere Spinello 2
Bovolone 2
Budapest 2
Castellammare Del Golfo 2
College Station 2
Copenhagen 2
Darmstadt 2
Delft 2
Totale 14162
Nome #
Hardware Design and Simulation for Verification 144
Estimation of BUS Performance for a Tuplespace in an Embedded Architecture 106
A 1000X Speed Up for Properties Completeness Evaluation 104
A Formal Support for Homogeneous Simulation of Heterogeneous Embedded Systems 99
Integration of mixed-signal components into virtual platforms for holistic simulation of smart systems 98
Modeling Network Embedded Systems with NS-2 and SystemC 95
On the reuse of RTL IPs for SysML model generation 95
Code Generation Alternatives to Reduce Heterogeneous Embedded Systems to Homogeneity 94
Model-Driven Design for the Development of Multi-Platform Smartphone Applications 93
A SystemC-based Platform for Assertion-based Verification and Mutation Analysis in Systems Biology 93
Modelling, Simulation, and Tuning of Metabolic Networks Through Electronic Design Automation 92
Virtual Hardware Prototyping Through Timed Hardware-Software Co-Simulation 91
A Combined Approach to Validate the Design of Embedded Network Devices 90
HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels 90
Automatic HDL Conversion and Abstraction Methodologies 90
On the Reuse of Heterogeneous IPs into SysML Models for Integration Validation 90
An Error Simulation Based Approach to Measure Error Coverage of Formal Properties 89
An EFSM-based Approach for Functional ATPG 88
Heterogeneous Co-Simulation of Networked Embedded Systems 87
HIFSuite: Tools for HDL Code Conversion and Manipulation 87
Analog Models Manipulation for Effective Integration in Smart System Virtual Platforms 87
Functional Design for Testability of Control-Dominated Architectures 85
A WEB-CAD Methodology for IP-Core Analysis and Simulation 85
On the Reuse of VHDL Modules into SystemC Design 84
Functional Verification based on the EFSM Model 84
Enabling dynamic assertion-based verification of embedded software through model-driven design 82
Automatic Network Protocol Synthesis from UML Sequence Diagrams 82
Automatic Integration of Cycle-accurate Descriptions with Continuous-time Models for Cyber-Physical Virtual Platforms 82
Power Characterization of LFSRs 81
Homogeneous Simulation: the Effective Integration Solution for Smart Systems 80
On the Reuse of RTL assertions in Systemc TLM Verification 80
SystemC: A Homogenous Environment to Test Embedded Systems 79
Combining Symbolic and Genetic Techniques for Efficient Sequential Circuit Test Generation 79
Redundant Functional Faults Reduction by Saboteur Synthesis 79
A Complete Testing Strategy Based on Interacting and Hierarchical FSMs 79
An Improved Electronic Design Automation Methodology for modelling Leukocyte Integrin Activation 79
A Verification Methodology for Reconfigurable Systems 79
An Application of Genetic Algorithms and BDDs to Functional Testing 78
Software/Network Co-Simulation of Heterogeneous Industrial Networks Architectures 78
A Toolchain for UML-based Modeling and Simulation of Networked Embedded Systems 78
Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC 77
Functional Fault Coverage: the Chamber of Secrets or an Accurate Estimation of Gate-Level Coverage? 77
On the Use of a High-Level Fault Model to Analyze Logical Consequence of Properties 77
Dynamic modeling and simulation of leukocyte integrin activation through an electronic design automation framework 77
Refinement of UML/MARTE models for the design of networked embedded systems 77
Symbolic Optimization of FSM Networks Based on Redundancies Identification and Removal 76
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip 76
UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration 76
AMLETO: A Multi-language Environment for Functional Test Generation 76
A VHDL Error Simulator for Functional Test Generation 75
Reusing RTL assertion checkers for verification of SystemC TLM models 75
A Middleware-Centric Design Flow for Networked Embedded Systems 74
Synthesis for Testability of Highly Complex Controllers by Functional Redundancy Removal 74
Effective EFSM generation for HW/SW-design verification 74
Generation of SystemC/TLM code from UML/MARTE sequence diagrams for verification 74
On the Automatic Generation of GPU‐oriented Software Applications from RTL IPs 74
Increase the Behavioral Fault Model Accuracy Using High-level Synthesis Information 73
Mixing ATPG and Property Checking for Testing HW/SW Interfaces 73
Symbad: Formal Verification in System Level-based Design (Extended Version) 73
FATE: a Functional ATPG to Traverse unstabilized EFSMs 73
Two-Dimensional Sequential Array Architectures: Design for Testability and Reconfiguration Issues 73
An Energy-Aware Co-Simulation Framework for the Design of Wireless Sensor Networks 73
A SystemC Platform for Signal Transduction Modelling and Simulation in Systems Biology 73
Testability Analysis and Behavioral Testing of the Hopfield Neural Paradigm 72
Automatic Generation of Error Control Codes for Computer Applications 72
Dynamic property mining for embedded software 72
Automatic abstraction of multi-discipline analog models for efficient functional simulation 72
Modeling and Analysis of Heterogeneous Industrial Networks Architectures 72
Model-Driven Design of Network Aspects of Distributed Embedded Systems 71
Virtual in-circuit emulation for timing accurate system prototyping 70
TLM/Network Design Space Exploration for Networked Embedded Systems 70
Testing Core-Based Digital Systems: A Symbolic Methodology 70
AME: an Abstract Middleware Environment for Validating Networked Embedded Systems Applications 70
Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions 70
UML-based Modeling and Simulation of Environmental Effects in Networked Embedded Systems 70
Analog fault testing through abstraction 70
Modeling and Simulation Alternatives for the Design of Networked Embedded Systems 70
Testability Alternatives Exploration through Functional Testing 69
A Protected IP-Core Test Generation 69
A Timing-Accurate Modeling and Simulation Environment for Networked Embedded Systems 69
Improving Gate-Level ATPG by Traversing Concurrent EFSMs 69
Communication-aware design flow for dependable networked embedded systems 69
Cyber-physical Systems Integration in a Production Line Simulator 69
Efficient Implementation and Abstraction of SystemC Data Types for Fast Simulation 69
Controller and Data-Path Separation by VHDL Restructuring 68
A SystemC-based Framework for Properties Incompleteness Evaluation 68
Coverage of Formal Properties based on a High-Level Fault Model and Functional ATPG 68
At-Speed Functional Verification of Programmable Devices 68
Correct-by-construction generation of device drivers based on RTL testbenches 68
Mixing simulated and actual hardware devices to validate device drivers in a complex embedded platform 68
Generation of VHDL code from UML/MARTE sequence diagrams for verification and synthesis 68
ISS-Centric Modular HW/SW Co-Simulation 68
Functional Verification of Networked Embedded Systems 67
On the Property-based Verification in SoC Design Flow Founded on Transaction Level Modeling 67
Hybrid Incremental Assertion-Based Verification for Functional Validation in TLM Design Flows 67
TIES: a Testability Increase Expert System for VLSI Design 67
Automatic Customization of Device Drivers for IP-cores Used with Assorted CPU Organizations 67
On the Reuse of TLM Mutation Analysis at RTL 67
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation 67
Code Generation Alternatives to Reduce Heterogeneous Embedded Systems to Homogeneity 67
Totale 7809
Categoria #
all - tutte 32456
article - articoli 6126
book - libri 205
conference - conferenze 24629
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 1496
Totale 64912


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2017/20181175 0000 00 643415 48104019
2018/20191446 143644421 121115 43539 102291971
2019/20202384 3371228275 267303 227192 96254101292
2020/20212524 18042092285 312362 45199 19338271127
2021/20222680 16878618194 32981 46107 7180202598
2022/20234518 4056345601038 5671219 950 0000
Totale 18265