Design of distributed embedded systems is a challenging task and it requires to raise the level of abstraction to overcome the complexity of the design. In particular, modeling languages and semantic specification are necessary to address network description at high level of abstraction. Starting from this abstraction view, model manipulation is needed to explore various design alternatives and code generation is required for their simulation. In this work, we propose the use of UML diagrams combined with a formal computational model as a key solution to specify requirements, generate design alternatives, and code for simulation. This paper proposes a formal framework and supporting tools to represent the application requirements, the library of network components, the environment description, and the rules to compose them. The framework allows to generate code for design validation by simulation and provides back annotation mechanism of the simulation results to refine the original model.

Model-Driven Design of Network Aspects of Distributed Embedded Systems

Ebeid, Emad Samuel Malki;FUMMI, Franco;QUAGLIA, Davide
2015

Abstract

Design of distributed embedded systems is a challenging task and it requires to raise the level of abstraction to overcome the complexity of the design. In particular, modeling languages and semantic specification are necessary to address network description at high level of abstraction. Starting from this abstraction view, model manipulation is needed to explore various design alternatives and code generation is required for their simulation. In this work, we propose the use of UML diagrams combined with a formal computational model as a key solution to specify requirements, generate design alternatives, and code for simulation. This paper proposes a formal framework and supporting tools to represent the application requirements, the library of network components, the environment description, and the rules to compose them. The framework allows to generate code for design validation by simulation and provides back annotation mechanism of the simulation results to refine the original model.
Unified Modeling Language (UML); MARTE; SystemC/TLM; simulation; network synthesis; network manipulation
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11562/878041
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