To validate an embedded network device it is important to insert it in a model of a real system and test its interaction with the surrounding blocks and used protocols. The proposed methodology joins two simulation environments, both based on the C++ programming language. The first (SystemC) is both a hardware definition language and a simulation library designed to model and simulate hardware and software systems:. The second (Network Simulator 2) is both a network definition language and a simulation tool designed to model and simulate network topologies. The aim of the paper concerns the analysis of the efficient integration of the two modeling/simulation environments. The proposed methodology; joining together SystemC and Network Simulator 2, has been applied to an example embedded network device based on the IEEE 1355 protocol.

A Combined Approach to Validate the Design of Embedded Network Devices

DRAGO, Nicola;FUMMI, Franco;MARTIGNANO, Maurizio;MARTINI, Stefano
2002

Abstract

To validate an embedded network device it is important to insert it in a model of a real system and test its interaction with the surrounding blocks and used protocols. The proposed methodology joins two simulation environments, both based on the C++ programming language. The first (SystemC) is both a hardware definition language and a simulation library designed to model and simulate hardware and software systems:. The second (Network Simulator 2) is both a network definition language and a simulation tool designed to model and simulate network topologies. The aim of the paper concerns the analysis of the efficient integration of the two modeling/simulation environments. The proposed methodology; joining together SystemC and Network Simulator 2, has been applied to an example embedded network device based on the IEEE 1355 protocol.
0780374487
Networked embedded systems; Vlidation; Cosimulation
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11562/16342
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