BOMBIERI, Nicola
 Distribuzione geografica
Continente #
NA - Nord America 3359
EU - Europa 3119
AS - Asia 908
OC - Oceania 13
SA - Sud America 5
Continente sconosciuto - Info sul continente non disponibili 3
AF - Africa 2
Totale 7409
Nazione #
US - Stati Uniti d'America 3344
GB - Regno Unito 957
CN - Cina 665
IT - Italia 658
SE - Svezia 362
FR - Francia 333
IE - Irlanda 262
VN - Vietnam 195
FI - Finlandia 171
DE - Germania 164
UA - Ucraina 68
BE - Belgio 45
RU - Federazione Russa 30
AT - Austria 14
AU - Australia 12
CA - Canada 12
CZ - Repubblica Ceca 12
GR - Grecia 10
IN - India 10
NL - Olanda 10
JP - Giappone 7
KR - Corea 7
TR - Turchia 6
IL - Israele 5
IR - Iran 5
BR - Brasile 4
DK - Danimarca 4
CH - Svizzera 3
PT - Portogallo 3
RO - Romania 3
SG - Singapore 3
BG - Bulgaria 2
EU - Europa 2
HU - Ungheria 2
MX - Messico 2
TW - Taiwan 2
A2 - ???statistics.table.value.countryCode.A2??? 1
BD - Bangladesh 1
CL - Cile 1
DZ - Algeria 1
EE - Estonia 1
EG - Egitto 1
ES - Italia 1
GP - Guadalupe 1
KH - Cambogia 1
KZ - Kazakistan 1
LV - Lettonia 1
NZ - Nuova Zelanda 1
PL - Polonia 1
SI - Slovenia 1
SK - Slovacchia (Repubblica Slovacca) 1
Totale 7409
Città #
Southend 852
Chandler 839
Woodbridge 576
Jacksonville 549
Ann Arbor 333
Verona 300
Dublin 256
Houston 146
Lawrence 125
Princeton 125
Dong Ket 119
Wilmington 112
Beijing 89
Nanjing 83
Ashburn 82
Jinan 73
Shenyang 68
Brussels 45
Milan 44
Hebei 38
Boardman 27
Jiaxing 27
Tianjin 26
Haikou 25
Changsha 24
Norwalk 23
Taiyuan 23
Zhengzhou 23
Ningbo 21
Redwood City 21
Nanchang 20
Hangzhou 19
Chicago 18
Des Moines 15
Falls Church 15
Taizhou 15
Fuzhou 14
Vienna 14
Fairfield 13
Lancaster 13
San Francisco 13
Redmond 12
Guangzhou 11
Shanghai 11
Boydton 10
Auburn Hills 7
Centrale 7
Dallas 7
Seattle 7
Tappahannock 7
Brno 6
Cambridge 6
Hamburg 6
Lanzhou 6
Melbourne 6
Naples 6
New York 6
Rome 6
Toronto 5
Altavilla Silentina 4
Athens 4
Barletta 4
Bovolone 4
Chions 4
Clearwater 4
Helsinki 4
Kunming 4
Leawood 4
Torino 4
Wuhan 4
Canberra 3
Conegliano 3
Dearborn 3
Duncan 3
Groningen 3
Hanover 3
Kashan 3
Legnago 3
Los Angeles 3
Nürnberg 3
Odense 3
Ogliastro Cilento 3
Riva 3
Saint-martin-d'heres 3
San Diego 3
Singapore 3
Tombolo 3
Baotou 2
Brendola 2
Büdingen 2
Castel 2
Castellammare Del Golfo 2
Columbus 2
Como 2
Delft 2
Elvas 2
Fiesso d'Artico 2
Fortaleza 2
Frankfurt am Main 2
Henderson 2
Totale 5516
Nome #
Arena-Idb: a platform to build human non-coding RNA interaction networks 176
Hardware Design and Simulation for Verification 144
Parametric Multi-Step Scheme for GPU-Accelerated Graph Decomposition into Strongly Connected Components 97
On the reuse of RTL IPs for SysML model generation 95
A SystemC-based Platform for Assertion-based Verification and Mutation Analysis in Systems Biology 93
Modelling, Simulation, and Tuning of Metabolic Networks Through Electronic Design Automation 92
BFS-4K: an Efficient Implementation of BFS for Kepler GPU Architectures 91
HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels 90
On the Reuse of Heterogeneous IPs into SysML Models for Integration Validation 90
HIFSuite: Tools for HDL Code Conversion and Manipulation 87
SMAC: Smart Systems Co-Design 83
CRISPRitz: rapid, high-throughput, and variant-aware in silico off-target site identification for CRISPR genome editing 81
SystemC simulation on GP-GPUs: CUDA vs. OpenCL 81
On the Reuse of RTL assertions in Systemc TLM Verification 80
An Improved Electronic Design Automation Methodology for modelling Leukocyte Integrin Activation 79
Dynamic modeling and simulation of leukocyte integrin activation through an electronic design automation framework 77
Reusing RTL assertion checkers for verification of SystemC TLM models 75
APPAGATO: an APproximate PArallel and stochastic GrAph querying TOol for biological networks 75
cuRnet: an R package for graph traversing on GPU 75
On the Automatic Generation of GPU‐oriented Software Applications from RTL IPs 74
An efficient implementation of the Bellman-Ford algorithm for Kepler GPU architectures 74
A SystemC Platform for Signal Transduction Modelling and Simulation in Systems Biology 73
TLM/Network Design Space Exploration for Networked Embedded Systems 70
Automatic Abstraction of RTL IPs into Equivalent TLM Descriptions 70
An Efficient Approach for Accelerating Bucket Elimination on GPUs 70
CUBE: A CUDA approach for Bucket Elimination on GPUs 70
Efficient Implementation and Abstraction of SystemC Data Types for Fast Simulation 69
At-Speed Functional Verification of Programmable Devices 68
Correct-by-construction generation of device drivers based on RTL testbenches 68
CRISPRitz: rapid, high-throughput, and variant-aware in silico off-target site identification for CRISPR genome editing 68
Functional Verification of Networked Embedded Systems 67
On the Property-based Verification in SoC Design Flow Founded on Transaction Level Modeling 67
Hybrid Incremental Assertion-Based Verification for Functional Validation in TLM Design Flows 67
Automatic Customization of Device Drivers for IP-cores Used with Assorted CPU Organizations 67
On the Reuse of TLM Mutation Analysis at RTL 67
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation 67
SyQUAL: a Platform for Qualitative Modelling and Simulation of Biological Systems 67
Fast and Power-efficient Embedded Software Implementation of Digital Image Stabilization for Low-cost Autonomous Boats 67
A Framework for the Design and Simulation of Embedded Vision Applications Based on OpenVX and ROS 67
On the Automatic Transactor Generation in TLM-based Design Flows 66
Automatic interface generation for component reuse in HW-SW partitioning 66
Testbench qualification of SystemC TLM protocols through Mutation Analysis 66
On the Use of GP-GPUs for Accelerating Compute-intensive EDA Applications 66
HIFSuite: Tools for HDL Code Conversion and Manipulation 66
A TLM Design for Verification Methodology 65
From RTL IP to functional system-level models with extra-functional properties 65
Pro++: A Profiling Framework for Primitive-based GPU Programming 65
Power-aware Performance Tuning of GPU Applications Through Microbenchmarking 65
Mutation Analysis for SystemC Designs at TLM 64
Exploiting GPU Architectures for Dynamic Invariant Mining 64
On the Evaluation of Transactor-based Verification for Reusing TLM Assertions and Testbenches at RTL 63
Automatic Transactor Generation in TLM by Exploiting EFSMs 63
Redesign and Verification of RTL IPs through RTL-to-TLM Abstraction and TLM Synthesis 63
An Enhanced Profiling Framework for the Analysis and Development of Parallel Primitives for GPUs 63
CRISPRme: Population and personal off-target sitecharacterization for CRISPR genome editing 63
MIPP: A Microbenchmark Suite for Performance, Power, and Energy Consumption Characterization of GPU architectures 62
Incremental ABV for Functional Validation of TL-to-RTL Design Refinement 61
Quickly Finding a Truss in a Haystack 61
Enhancing Performance of Computer Vision Applications on Low-Power Embedded Systems Through Heterogeneous Parallel Programming 61
Graph Algorithms on GPUs 61
On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling 60
Incremental ABV for TL-to-RTL Design Refinement 60
Accelerating RTL Fault Simulation through RTL-to-TLM Abstraction 59
Mangrove: an Inference-based Dynamic Invariant Mining for GPU Architectures 59
System/Network Design Space Exploration based on TLM for Networked Embedded Systems 58
Addressing the Smart Systems Design Challenge: The SMAC Platform 58
RTL property abstraction for TLM assertion-based verification 58
A Methodology for Abstracting RTL Designs into TL Descriptions 57
Reuse and Optimization of Testbenches and Properties in a TLM-to-RTL Design Flow 57
A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors 57
A dynamic approach for workload partitioning on GPU architectures 57
On the automatic synthesis of parallel SW from RTL models of hardware IPs 57
FAST: An RTL Fault Simulation Framework based on RTL-to-TLM Abstraction 56
Comprehensive reconstruction and visualization of non-coding regulatory networks in human 55
Automatic Synthesis of OSCI TLM-2.0 Models into RTL Bus-based IPs 55
A Mutation Model for the SystemC TLM 2.0 Communication Interfaces 54
Energy Aware TLM Platform Simulation via RTL Abstraction 54
A Method to Abstract RTL IP Blocks into C++ Code and Enable High-Level Synthesis 54
On the Load Balancing Techniques for GPU Applications Based on Prefix-scan 54
Data Flow ORB-SLAM for Real-time Performance on Embedded GPU Boards 54
A Fine-grained Performance Model for GPU Architectures 54
Semi-Automatic Generation of Device Drivers for Rapid Embedded Platform Development 53
Configuring Graph Traversal Applications for GPUs: Analysis of Implementation Strategies and their Correlation with Graph Characteristics 53
Towards Equivalence Checking Between TLM and RTL Models 52
Abstraction of RTL IPs into Embedded Software 52
An Efficient Implementation of a Subgraph Isomorphism Algorithm for GPUs. 52
On the Task Mapping and Scheduling for DAG-based Embedded Vision Applications on Heterogeneous Multi/Many-core Architectures 52
A Methodology to Recover RTL IP Functionality for Automatic Generation of SW Applications 52
RTL IP abstraction into optimized embedded software 51
RTL-TLM Equivalence Checking Based on Simulation 50
Model Checking on TLM-2.0 IPs through automatic TLM-to-RTL synthesis 50
Rapid Prototyping of Embedded Vision Systems: Embedding Computer Vision Applications into Low-Power Heterogeneous Architectures 50
Human genetic diversity alters therapeutic gene editing off-target outcomes 50
Efficient Simulation and Parametrization of Stochastic Petri Nets in SystemC: A Case study from Systems Biology 49
On the Mutation Analysis of SystemC TLM-2.0 Standard 48
Optimising Memory Management for Belief Propagation in Junction Trees using GPGPUs 46
Smart Systems Integration and Simulation 45
GRAPES: a Software for Parallel Searching on Biological Graphs targeting Multi-core Architectures 45
A performance, power, and energy efficiency analysis of load balancing techniques for GPUs 45
MIRATE: MIps RATional dEsign Science Gateway 45
Totale 6604
Categoria #
all - tutte 13954
article - articoli 3796
book - libri 90
conference - conferenze 9612
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 456
Totale 27908


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2017/2018632 0000 00 240320 10132920
2018/2019703 381720125 4078 14317 72191736
2019/2020940 13282083 134125 7748 449264113
2020/20211199 7914857111 131200 2060 641793219
2021/20221031 5725215121 7850 1848 483185228
2022/20232001 179247296424 241557 570 0000
Totale 7719