Sfoglia per Autore
A VHDL Error Simulator for Functional Test Generation
2000-01-01 Fin, Alessandro; Fummi, Franco
Symbolic Optimization of FSM Networks Based on Redundancies Identification and Removal
2000-01-01 F., Ferrandi; Fummi, Franco; E., Macii; M., Poncino; D., Sciuto
Testability Alternatives Exploration through Functional Testing
2000-01-01 F., Ferrandi; G., Ferrara; G., Fornara; Fummi, Franco; D., Sciuto
An Extended UIO-Based Method for Protocol Conformance Testing
2000-01-01 G., Buonanno; Fummi, Franco; D., Sciuto
A WEB-CAD Methodology for IP-Core Analysis and Simulation
2000-01-01 Fin, Alessandro; Fummi, Franco
An Application of Genetic Algorithms and BDDs to Functional Testing
2000-01-01 F., Ferrandi; Fin, Alessandro; Fummi, Franco; D., Sciuto
A Hierarchical Approach to Test Generation for Large Controllers
2000-01-01 Fummi, Franco; Sciuto, D.
Combining Symbolic and Genetic Techniques for Efficient Sequential Circuit Test Generation
2000-01-01 M., Boschini; X., Yu; Fummi, Franco; E. M., Rudnick
BIST Architectures Selection Based on Behavioral Testing
2000-01-01 G., Biasoli; F., Ferrandi; Fin, Alessandro; Fummi, Franco; D., Sciuto
On the Reuse of VHDL Modules into SystemC Design
2001-01-01 N., Agliada; Fin, Alessandro; Fummi, Franco; Martignano, Maurizio; Pravadelli, Graziano
Functional Test Generation for Behaviorally Sequential Models
2001-01-01 G., Ferrara; F., Ferrandi; Fin, Alessandro; Fummi, Franco; D., Sciuto
AMLETO: A Multi-language Environment for Functional Test Generation
2001-01-01 Fin, Alessandro; Fummi, Franco; Pravadelli, Graziano
Sequential Circuit Test Generation Using a Symbolic/Genetic Hybrid Approach
2001-01-01 Fummi, Franco; M., Boschini; X., Yu; E. M., Rudnick
Soft-Cores Generation by Instruction Set Analysis
2001-01-01 Fin, Alessandro; Fummi, Franco; Perbellini, Giovanni
The Use of SystemC for Design Verification and Integration Test of IP-Cores
2001-01-01 Fin, Alessandro; Fummi, Franco; D., Signoretto
SystemC: A Homogenous Environment to Test Embedded Systems
2001-01-01 Fin, Alessandro; Fummi, Franco; Martignano, Maurizio; M., Signoretto
On the Use of a Fault Model to Validate the Completeness of a Set of Properties
2002-01-01 A., Fedeli; Fummi, Franco; Pravadelli, Graziano; U., Rossi; F., Toto
Functional Test Generation: Overview and Proposal of a Hybrid Genetic Approach
2002-01-01 Ferrandi, F.; Fin, Alessandro; Fummi, Franco; Sciuto, D.
A Combined Approach to Validate the Design of Embedded Network Devices
2002-01-01 Drago, Nicola; Fummi, Franco; Martignano, Maurizio; Martini, Stefano
Emulation-based Design Errors Identification
2002-01-01 A., Castelnuovo; Fin, Alessandro; Fummi, Franco; F., Sforza
Titolo | Data di pubblicazione | Autore(i) | File |
---|---|---|---|
A VHDL Error Simulator for Functional Test Generation | 1-gen-2000 | Fin, Alessandro; Fummi, Franco | |
Symbolic Optimization of FSM Networks Based on Redundancies Identification and Removal | 1-gen-2000 | F., Ferrandi; Fummi, Franco; E., Macii; M., Poncino; D., Sciuto | |
Testability Alternatives Exploration through Functional Testing | 1-gen-2000 | F., Ferrandi; G., Ferrara; G., Fornara; Fummi, Franco; D., Sciuto | |
An Extended UIO-Based Method for Protocol Conformance Testing | 1-gen-2000 | G., Buonanno; Fummi, Franco; D., Sciuto | |
A WEB-CAD Methodology for IP-Core Analysis and Simulation | 1-gen-2000 | Fin, Alessandro; Fummi, Franco | |
An Application of Genetic Algorithms and BDDs to Functional Testing | 1-gen-2000 | F., Ferrandi; Fin, Alessandro; Fummi, Franco; D., Sciuto | |
A Hierarchical Approach to Test Generation for Large Controllers | 1-gen-2000 | Fummi, Franco; Sciuto, D. | |
Combining Symbolic and Genetic Techniques for Efficient Sequential Circuit Test Generation | 1-gen-2000 | M., Boschini; X., Yu; Fummi, Franco; E. M., Rudnick | |
BIST Architectures Selection Based on Behavioral Testing | 1-gen-2000 | G., Biasoli; F., Ferrandi; Fin, Alessandro; Fummi, Franco; D., Sciuto | |
On the Reuse of VHDL Modules into SystemC Design | 1-gen-2001 | N., Agliada; Fin, Alessandro; Fummi, Franco; Martignano, Maurizio; Pravadelli, Graziano | |
Functional Test Generation for Behaviorally Sequential Models | 1-gen-2001 | G., Ferrara; F., Ferrandi; Fin, Alessandro; Fummi, Franco; D., Sciuto | |
AMLETO: A Multi-language Environment for Functional Test Generation | 1-gen-2001 | Fin, Alessandro; Fummi, Franco; Pravadelli, Graziano | |
Sequential Circuit Test Generation Using a Symbolic/Genetic Hybrid Approach | 1-gen-2001 | Fummi, Franco; M., Boschini; X., Yu; E. M., Rudnick | |
Soft-Cores Generation by Instruction Set Analysis | 1-gen-2001 | Fin, Alessandro; Fummi, Franco; Perbellini, Giovanni | |
The Use of SystemC for Design Verification and Integration Test of IP-Cores | 1-gen-2001 | Fin, Alessandro; Fummi, Franco; D., Signoretto | |
SystemC: A Homogenous Environment to Test Embedded Systems | 1-gen-2001 | Fin, Alessandro; Fummi, Franco; Martignano, Maurizio; M., Signoretto | |
On the Use of a Fault Model to Validate the Completeness of a Set of Properties | 1-gen-2002 | A., Fedeli; Fummi, Franco; Pravadelli, Graziano; U., Rossi; F., Toto | |
Functional Test Generation: Overview and Proposal of a Hybrid Genetic Approach | 1-gen-2002 | Ferrandi, F.; Fin, Alessandro; Fummi, Franco; Sciuto, D. | |
A Combined Approach to Validate the Design of Embedded Network Devices | 1-gen-2002 | Drago, Nicola; Fummi, Franco; Martignano, Maurizio; Martini, Stefano | |
Emulation-based Design Errors Identification | 1-gen-2002 | A., Castelnuovo; Fin, Alessandro; Fummi, Franco; F., Sforza |
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