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EnglishThe aim of this paper is to show the effectiveness of a high-level approach to testability analysis and test pattern generation, when analyzing different classes of architectures implementing the same specification. A unique test set is derived on the behavioral specification, based on a functional error model, which shows a high correlation with the single stuck-at-gate-level fault model. Such a test set is then tailored to the particular gate-level implementation by transforming it into a specific test sequence, based on the scheduling adopted by the high-level synthesis. Experimental results show that the application of such test sequences allows one to accurately evaluate the testability of the architecture in terms of gate-level fault coverage, in a fraction of the time required by a gate-level test pattern generator
| Titolo: | Testability Alternatives Exploration through Functional Testing | |
| Autori: | ||
| Data di pubblicazione: | 2000 | |
| Abstract: | The aim of this paper is to show the effectiveness of a high-level approach to testability analysis and test pattern generation, when analyzing different classes of architectures implementing the same specification. A unique test set is derived on the behavioral specification, based on a functional error model, which shows a high correlation with the single stuck-at-gate-level fault model. Such a test set is then tailored to the particular gate-level implementation by transforming it into a specific test sequence, based on the scheduling adopted by the high-level synthesis. Experimental results show that the application of such test sequences allows one to accurately evaluate the testability of the architecture in terms of gate-level fault coverage, in a fraction of the time required by a gate-level test pattern generator | |
| Handle: | http://hdl.handle.net/11562/15465 | |
| Appare nelle tipologie: | 04.01 Contributo in atti di convegno |
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