A pre-condition for any verification technique based on simulation is the generation of a high-quality set of stimuli that effectively and efficiently cover the whole state space of the Design Under Verification (DUV), including hard-to-reach corner cases. To cope with this necessity, several approaches for the automatic generation of stimuli have been proposed for both embedded software and high-level descriptions of hardware components. Most of these approaches use constraint solvers to generate the sequences of stimuli that trigger specific conditions, enabling the analysis of corner cases. However, the automatic identification of those conditions is still an open problem, especially for black-box designs. To fill in the gap, this paper proposes a stimuli generator, based on a dynamic invariant miner, that identifies and stresses DUV areas that are not deeply analysed by traditional pseudo- random high-level Automatic Test Pattern Generators (ATPGs), thus guaranteeing an higher coverage of corner cases during black-box verification.
Stimuli Generation through Invariant Mining for Black-Box Verification
PICCOLBONI, LUCA;PRAVADELLI, Graziano
2016-01-01
Abstract
A pre-condition for any verification technique based on simulation is the generation of a high-quality set of stimuli that effectively and efficiently cover the whole state space of the Design Under Verification (DUV), including hard-to-reach corner cases. To cope with this necessity, several approaches for the automatic generation of stimuli have been proposed for both embedded software and high-level descriptions of hardware components. Most of these approaches use constraint solvers to generate the sequences of stimuli that trigger specific conditions, enabling the analysis of corner cases. However, the automatic identification of those conditions is still an open problem, especially for black-box designs. To fill in the gap, this paper proposes a stimuli generator, based on a dynamic invariant miner, that identifies and stresses DUV areas that are not deeply analysed by traditional pseudo- random high-level Automatic Test Pattern Generators (ATPGs), thus guaranteeing an higher coverage of corner cases during black-box verification.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.