The paper summarizes a bottom-up modeling and simulation methodology that starts from heterogeneous models written in heterogeneous languages and it composes them into a homogenous system-level description by exploiting automatic translation and abstraction. This allows the designer to work with his/her favorite design language for representing the heterogeneous behaviors of an embedded system (digital hw, analog hw, software, network, environment, ...), but these heterogeneous low level descriptions can be abstracted into a homogeneous system level model for verification, design space exploration, extra-functional properties validation, etc. This huge heterogeneity is particularly evident in smart systems, to whom the methodology has been effectively applied.
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