Virtual platforms are gaining attention for thedevelopment and validation of embedded softwarebefore the corresponding hardware is available.Transaction-level modelling (TLM) is the mostpromising technique to develop virtual platforms.However, modelling a complex system completelyat transaction level could be an expensive task. Thispaper presents recent developments done byEDALab to simplify the creation of TLM virtualplatforms. In particular, it describes 1) amethodology and a tool to generate TLM modelsfrom re-used IP cores described at register transferlevel (RTL) or by using model-driven design toolssuch as Matlab/Stateflow, 2) a SystemC/TLMlibrary to simulate packet-based communicationsoutside the system in case of networked embeddedsystems.

Enabling tools for virtual platforms

QUAGLIA, Davide;FUMMI, Franco;STEFANNI, Francesco;BOMBIERI, Nicola
2012

Abstract

Virtual platforms are gaining attention for thedevelopment and validation of embedded softwarebefore the corresponding hardware is available.Transaction-level modelling (TLM) is the mostpromising technique to develop virtual platforms.However, modelling a complex system completelyat transaction level could be an expensive task. Thispaper presents recent developments done byEDALab to simplify the creation of TLM virtualplatforms. In particular, it describes 1) amethodology and a tool to generate TLM modelsfrom re-used IP cores described at register transferlevel (RTL) or by using model-driven design toolssuch as Matlab/Stateflow, 2) a SystemC/TLMlibrary to simulate packet-based communicationsoutside the system in case of networked embeddedsystems.
Virtual Platform
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11562/900185
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