An FSM re-engineering approach to sequential circuit synthesis by state splitting

This paper presents a finite state machine (FSM) re-engineering method that enhances the FSM synthesis by re-constructing a functionally equivalent but topologically different FSM based on the optimization objective. This method enables the FSM synthesis algorithms to explore a set of functionally equivalent FSMs and obtain better solutions than those in the original FSM. To demonstrate the effectiveness of the proposed method, we apply it to popular power-driven and area-driven FSM synthesis algorithms respectively. Our method achieves an average 5.5% power reduction and 2.7% area reduction respectively on 25 MCNC FSM benchmarks where the proposed method is applicable. This is a significant performance improvement for the power-driven and area-driven FSM synthesis algorithms being used. Our method has negligible run-time overhead and it maintains the quality of the synthesis solutions.