VILLA, Tiziano

VILLA, Tiziano  

DIPARTIMENTO DI INFORMATICA  

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Titolo Data di pubblicazione Autore(i) File
A Boolean heuristic for disjoint SOP synthesis 1-gen-2021 Balasubramanian, Padmanabhan; Bernasconi, Anna; Ciriani, Valentina; Villa, Tiziano
A case study of hybrid controller synthesis of a heating system 1-gen-1999 A., Balluchi; L., Benvenuti; Villa, Tiziano; H., Wong Toi; A., Sangiovanni Vincentelli
A computable and compositional semantics for hybrid automata 1-gen-2020 Bresolin, Davide; Collins, Pieter; Geretti, Luca; Segala, Roberto; Villa, Tiziano; Zivanovic Gonzalez, Sanja
A fast and robust exact algorithm for face embedding 1-gen-1997 E., Goldberg; Villa, Tiziano; R., Brayton; A., Sangiovanni Vincentelli
A framework for satisfying input and output encoding constraints 1-gen-1991 A., Saldanha; Villa, Tiziano; R., Brayton; A., Sangiovanni Vincentelli
A fully implicit algorithm for exact state minimization 1-gen-1994 T., Kam; Villa, Tiziano; R., Brayton; A., Sangiovanni Vincentelli
A higher order method for input-affine uncertain systems 1-gen-2023 Zivanovic Gonzalez, Sanja; Geretti, Luca; Bresolin, Davide; Villa, Tiziano; Collins, Pieter
A new algorithm for the largest compositionally progressive solution of synchronous language equations 1-gen-2007 Villa, Tiziano; S., Zharikova; N., Yevtushenko; R., Brayton; A. L., Sangiovanni Vincentelli
A new algorithm to solve synchronous FSM equations 1-gen-2008 N., Yevtushenko; S., Tikhomirova; Villa, Tiziano
A Platform-Based Design Methodology with Contracts and Related Tools for the Design of Cyber-Physical Systems 1-gen-2015 Nuzzo, P.; Sangiovanni Vincentelli, A.; Bresolin, Davide; Geretti, Luca; Villa, Tiziano
Advances in encoding for logic synthesis 1-gen-2000 L., Lavagno; Villa, Tiziano; A., Sangiovanni Vincentelli
An approximation algorithm for cofactoring-based synthesis 1-gen-2011 Bernasconi, A.; Ciriani, V.; Liberali, G.; Trucco, G.; Villa, Tiziano
An exact input encoding algorithm for BDDs representing FSMs 1-gen-1998 W., Gosti; Villa, Tiziano; A., Saldanha; A., Sangiovanni Vincentelli
An FSM re-engineering approach to sequential circuit synthesis by state splitting 1-gen-2008 L., Yuan; G., Qu; Villa, Tiziano; A. L., Sangiovanni Vincentelli
An implicit formulation for exact BDD minimization of incompletelyspecified functions 1-gen-1997 A., Oliveira; L., Carloni; Villa, Tiziano; A., Sangiovanni Vincentelli
An Introduction to the Verification of Hybrid Systems using Ariadne 1-gen-2015 Bresolin, Davide; Geretti, Luca; Villa, Tiziano; P., Collins
Approximate Logic Synthesis by Symmetrization 1-gen-2019 Bernasconi, Anna; Ciriani, Valentina; Villa, Tiziano
Ariadne: a Framework for Reachability Analysis of Hybrid Automata 1-gen-2006 A., Balluchi; A., Casagrande; P., Collins; A., Ferrari; Villa, Tiziano; A. L., SANGIOVANNI VINCENTELLI
Ariadne: a library for computing with hybrid automata 1-gen-2005 A., Balluchi; A., Casagrande; P., Collins; P., Murrieri; Villa, Tiziano; A. L., SANGIOVANNI VINCENTELLI
Ariadne: Dominance Checking of Nonlinear Hybrid Automata Using Reachability Analysis 1-gen-2012 L., Benvenuti; Bresolin, Davide; P., Collins; A., Ferrari; Geretti, Luca; Villa, Tiziano