A new approach is presented for test pattern generation for finite state machines and the relationships with their gate level implementation. The results on a study on implementation constraints that will guarantee a fixed fault coverage are presented. The proposed techniques are checked through some MCNC benchmarks and their results are compared with previous papers.
Functional Testing and Constrained Synthesis of Sequential Architectures
FUMMI, Franco;
1993-01-01
Abstract
A new approach is presented for test pattern generation for finite state machines and the relationships with their gate level implementation. The results on a study on implementation constraints that will guarantee a fixed fault coverage are presented. The proposed techniques are checked through some MCNC benchmarks and their results are compared with previous papers.
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