This paper describes an approach for enhancing the effectiveness of behavioral test generation by considering high-level and logic synthesis information to increase the correlation between the behavioral fault model and the stuck-at-fault model. In particular we mainly consider two types of information: the mapping between high-level operators and RTL modules and the type of gate level implementation adopted by the RTL modules.

Increase the Behavioral Fault Model Accuracy Using High-level Synthesis Information

FUMMI, Franco
1999

Abstract

This paper describes an approach for enhancing the effectiveness of behavioral test generation by considering high-level and logic synthesis information to increase the correlation between the behavioral fault model and the stuck-at-fault model. In particular we mainly consider two types of information: the mapping between high-level operators and RTL modules and the type of gate level implementation adopted by the RTL modules.
Automatic test pattern generator; High-level testing; High-level Synthesis
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11562/15468
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