Analog Hardware Description Languages (AHDLs) provide a valuable alternative to existing proprietary means of implementing defect models and generic templates. Analog defect modeling in SPICE engines and in event-driven digital simulators is discussed, with a review of the state-of-the-art, an analysis of possibilities, and proposals for future enhancements of tools and standards to meet the challenges of achieving good coverage estimations at the system level. Moreover, we discuss the possibilities of using the EDACurry open-source framework to instrument transistor-level analog circuits to support defects templates written through AHDL, e.g., Verilog-A.

Analog Fault Simulation: Trends and Perspectives in Analog Hardware Description Languages

Nicola Dall'Ora
;
Enrico Fraccaroli
;
Franco Fummi
2024-01-01

Abstract

Analog Hardware Description Languages (AHDLs) provide a valuable alternative to existing proprietary means of implementing defect models and generic templates. Analog defect modeling in SPICE engines and in event-driven digital simulators is discussed, with a review of the state-of-the-art, an analysis of possibilities, and proposals for future enhancements of tools and standards to meet the challenges of achieving good coverage estimations at the system level. Moreover, we discuss the possibilities of using the EDACurry open-source framework to instrument transistor-level analog circuits to support defects templates written through AHDL, e.g., Verilog-A.
2024
Analog circuits
Fault simulation
Defect model templates
AHDLs
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11562/1128507
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