Virtual platforms are a powerful support for the development and early validation of embedded SW. However, complex smart devices are built by aggregating heterogeneous components provided by different vendors, thus requiring the development of custom ad-hoc virtual platforms. Even worse, components of the underneath HW platform may belong to different design domains, that are usually expressed using a huge variety of different languages. This high degree of heterogeneity in terms of both design and specification languages must be effectively managed by the design flow so to help engineers in assembling the final system.
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