The current generation of computer systems operates on the principles of binary logic, which encompasses both logical andarithmetic operations. However, silicon technology has reached its peak performance, prompting researchers to explore alternativemethods for enhancing computational efficiency. One such method is the adoption of Multi-Valued Logic (MVL) technology,which offers a promising avenue for increased computational efficiency. This study introduces a novel decenary logic family,implemented using analog circuitry with significantly reduced complexity. The proposed circuits are designed in both analogand voltage modes. Designing Min, Max, Optimism Step (OS), and Pessimism Step (PS) operators a universal logic familyis introduced. Finally, experimental results were presented and compared against various binary and MVL technologies. Thesecircuits are proof of concept and can be implemented using new technologies such as GaN to significantly reduce the size oftransistors. © 2026 The Author(s). IEEJ Transactions on Electrical and Electronic Engineering published by Institute of ElectricalEngineers of Japan and Wiley Periodicals LLC.

An Innovative Approach to Multi-Valued Logic

Ali Mokhtari;
2026-01-01

Abstract

The current generation of computer systems operates on the principles of binary logic, which encompasses both logical andarithmetic operations. However, silicon technology has reached its peak performance, prompting researchers to explore alternativemethods for enhancing computational efficiency. One such method is the adoption of Multi-Valued Logic (MVL) technology,which offers a promising avenue for increased computational efficiency. This study introduces a novel decenary logic family,implemented using analog circuitry with significantly reduced complexity. The proposed circuits are designed in both analogand voltage modes. Designing Min, Max, Optimism Step (OS), and Pessimism Step (PS) operators a universal logic familyis introduced. Finally, experimental results were presented and compared against various binary and MVL technologies. Thesecircuits are proof of concept and can be implemented using new technologies such as GaN to significantly reduce the size oftransistors. © 2026 The Author(s). IEEJ Transactions on Electrical and Electronic Engineering published by Institute of ElectricalEngineers of Japan and Wiley Periodicals LLC.
2026
multi-valued logic
maximum
minimum
analog circuit based MVL
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11562/1190997
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