The aim of the reported work is to help design of decenary Multi-Valued Logic (MVL) circuits. This paper reports a work, in which, analog voltage-based circuitry is used to design MVL circuits. In this paper, some analog circuits are reported as elements that can be used in Multi-Valued Logic (MVL) circuitry. This article reported a MOSFET-Based Differential Amplifier (MBDA) as a key element in designing decenary MVL arithmetic unit. Operating voltage range and linearity of the gain are two important characteristics of this element. The operating voltage range for the MBDA is 0V to 5.5V as a output voltage.The achieved linear gain is within the range of 0.1V to 5.3V. Analog inverter and correction buffer circuits are reported based on MBDA. Analog inverter will be used in computational and logical decenary MVL circuits. The correction buffer is designed as an element to eliminate noises and signal drift at the output of the MVL gates and during data transfer.

A New Multi-Valued Logic Buffer and Inverter Using MOSFET Based Differential Amplifier

Ali Mokhtari
2022-01-01

Abstract

The aim of the reported work is to help design of decenary Multi-Valued Logic (MVL) circuits. This paper reports a work, in which, analog voltage-based circuitry is used to design MVL circuits. In this paper, some analog circuits are reported as elements that can be used in Multi-Valued Logic (MVL) circuitry. This article reported a MOSFET-Based Differential Amplifier (MBDA) as a key element in designing decenary MVL arithmetic unit. Operating voltage range and linearity of the gain are two important characteristics of this element. The operating voltage range for the MBDA is 0V to 5.5V as a output voltage.The achieved linear gain is within the range of 0.1V to 5.3V. Analog inverter and correction buffer circuits are reported based on MBDA. Analog inverter will be used in computational and logical decenary MVL circuits. The correction buffer is designed as an element to eliminate noises and signal drift at the output of the MVL gates and during data transfer.
2022
Multi-Valued Logic
Differential Amplifier
Linear gain
MVL inverter
MVL correction buffer
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11562/1155492
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