This chapter proposes to study the problem of the synthesis of a SANN application by means of a genetic algorithm, where by synthesis we mean the configuration of a SANN that realizes a desired application, with particular attention to the efficiency of its hardware implementation on an FPGA. It is important to note that a genetic algorithm approach bene- fits from specific information on the problem to solve. In addition, a hardware implementation of a SANN necessarily depends on the chosen neural network model. This implies that we cannot really prescind from referring to a specific ANN model, due to its detailed theoretical characterization. Nonetheless, the focus of the chapter is not on the peculiar benefits of the chosen model but on the actual issues that stem from trying to design a genetic algorithm for a SANN and at the same time paying attention to the compactness of the network that realizes the desired application.
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