n the hardware design, assertion-based verification (ABV) affirmed as an effective methodology for functional verification, i.e., design specification conformance. However, up to now, there were only limited studies concerning the application of simulation-based ABV to embedded-software design and verification flow. We propose an analysis aiming to bridge such a gap. In particular, we illustrate how ABV can integrate and improve the various stages of the verification flow. Moreover, the analysis leads us to develop a comprehensive and practical dynamic ABV environment for micro-controller embedded-software.
IPA: Assertion-based verification in embedded-software design
DI GUGLIELMO, Giuseppe;DI GUGLIELMO, Luigi;FUMMI, Franco;PRAVADELLI, Graziano
2011-01-01
Abstract
n the hardware design, assertion-based verification (ABV) affirmed as an effective methodology for functional verification, i.e., design specification conformance. However, up to now, there were only limited studies concerning the application of simulation-based ABV to embedded-software design and verification flow. We propose an analysis aiming to bridge such a gap. In particular, we illustrate how ABV can integrate and improve the various stages of the verification flow. Moreover, the analysis leads us to develop a comprehensive and practical dynamic ABV environment for micro-controller embedded-software.
File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
